Index: sys/arch/arm/arm/cpufunc_asm_arm11.S
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm/cpufunc_asm_arm11.S,v
retrieving revision 1.16
diff -u -p -r1.16 cpufunc_asm_arm11.S
--- sys/arch/arm/arm/cpufunc_asm_arm11.S	29 Oct 2014 16:14:45 -0000	1.16
+++ sys/arch/arm/arm/cpufunc_asm_arm11.S	29 Oct 2014 16:18:39 -0000
@@ -97,7 +97,8 @@ END(arm11_tlb_flushI)
 
 ENTRY(arm11_tlb_flushI_SE)
 #ifdef ARM_MMU_EXTENDED
-	orr	r0, r0, r1		/* insert ASID into MVA */
+	bic	r0, r0, #0xff
+	bic	r0, r0, #0xf00		/* Always KERNEL_PID, i.e. 0 */
 #endif
 	mcr	p15, 0, r0, c8, c5, 1	/* flush I tlb single entry */
 #if PAGE_SIZE == 2 * L2_S_SIZE
@@ -119,7 +120,8 @@ END(arm11_tlb_flushD)
 
 ENTRY(arm11_tlb_flushD_SE)
 #ifdef ARM_MMU_EXTENDED
-	orr	r0, r0, r1		/* insert ASID into MVA */
+	bic	r0, r0, #0xff
+	bic	r0, r0, #0xf00		/* Always KERNEL_PID, i.e. 0 */
 #endif
 	mcr	p15, 0, r0, c8, c6, 1	/* flush D tlb single entry */
 #if PAGE_SIZE == 2 * L2_S_SIZE
@@ -140,7 +142,8 @@ END(arm11_tlb_flushID)
 
 ENTRY(arm11_tlb_flushID_SE)
 #ifdef ARM_MMU_EXTENDED
-	orr	r0, r0, r1		/* insert ASID into MVA */
+	bic	r0, r0, #0xff
+	bic	r0, r0, #0xf00		/* Always KERNEL_PID, i.e. 0 */
 #endif
 	mcr	p15, 0, r0, c8, c7, 1	/* flush I+D tlb single entry */
 #if PAGE_SIZE == 2 * L2_S_SIZE
Index: sys/arch/arm/arm/cpufunc_asm_armv7.S
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm/cpufunc_asm_armv7.S,v
retrieving revision 1.18
diff -u -p -r1.18 cpufunc_asm_armv7.S
--- sys/arch/arm/arm/cpufunc_asm_armv7.S	31 Jul 2014 06:26:06 -0000	1.18
+++ sys/arch/arm/arm/cpufunc_asm_armv7.S	29 Oct 2014 16:18:39 -0000
@@ -78,10 +78,7 @@ END(armv7_tlb_flushID_ASID)
 STRONG_ALIAS(armv7_tlb_flushD_SE, armv7_tlb_flushID_SE)
 STRONG_ALIAS(armv7_tlb_flushI_SE, armv7_tlb_flushID_SE)
 ENTRY(armv7_tlb_flushID_SE)
-	bfc	r0, #0, #12		@ clear ASID
-#ifdef ARM_MMU_EXTENDED
-	bfi	r0, r1, #0, #8		@ insert ASID into MVA
-#endif
+	bfc	r0, #0, #12		@ Always KERNEL_PID, i.e. 0
 #ifdef MULTIPROCESSOR
 	mcr	p15, 0, r0, c8, c3, 1	@ flush I+D tlb single entry
 #if PAGE_SIZE == 2*L2_S_SIZE
Index: sys/arch/arm/arm/cpufunc_asm_pj4b.S
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm/cpufunc_asm_pj4b.S,v
retrieving revision 1.4
diff -u -p -r1.4 cpufunc_asm_pj4b.S
--- sys/arch/arm/arm/cpufunc_asm_pj4b.S	30 Mar 2014 01:15:03 -0000	1.4
+++ sys/arch/arm/arm/cpufunc_asm_pj4b.S	29 Oct 2014 16:18:39 -0000
@@ -78,6 +78,7 @@ ENTRY(pj4b_tlb_flushID)
 END(pj4b_tlb_flushID)
 
 ENTRY(pj4b_tlb_flushID_SE)
+	bfc	r0, #0, #12             @ always KERNEL_PID (i.e. 0)
 	mcr	p15, 0, r0, c8, c7, 1	@flush I+D tlb single entry
 #if PAGE_SIZE == 2 * L2_S_SIZE
 	add	r0, r0, L2_S_SIZE