Index: sys/arch/mips/include/pte.h =================================================================== RCS file: /cvsroot/src/sys/arch/mips/include/pte.h,v retrieving revision 1.23 diff -u -p -r1.23 pte.h --- sys/arch/mips/include/pte.h 11 Jul 2016 16:15:35 -0000 1.23 +++ sys/arch/mips/include/pte.h 4 Sep 2016 06:44:21 -0000 @@ -315,7 +315,7 @@ static inline bool pte_cached_p(pt_entry_t pte) { if (MIPS_HAS_R4K_MMU) { - return MIPS3_PG_TO_CCA(pte) == mips_options.mips3_pg_cached; + return MIPS3_PG_TO_CCA(pte) == MIPS3_PG_TO_CCA(mips_options.mips3_pg_cached); } else { return (pte & MIPS1_PG_N) == 0; } Index: sys/arch/mips/mips/cache.c =================================================================== RCS file: /cvsroot/src/sys/arch/mips/mips/cache.c,v retrieving revision 1.53 diff -u -p -r1.53 cache.c --- sys/arch/mips/mips/cache.c 19 Aug 2016 10:05:35 -0000 1.53 +++ sys/arch/mips/mips/cache.c 4 Sep 2016 06:44:22 -0000 @@ -465,8 +465,6 @@ mips_config_cache_prehistoric(void) panic("r4k pdcache line size %d", mci->mci_pdcache_line_size); } - - /* Virtually-indexed cache; no use for colors. */ break; case MIPS_R4600: @@ -581,8 +579,6 @@ primary_cache_is_2way: mco->mco_pdcache_wbinv_range = vr4131v1_pdcache_wbinv_range_16; } - - /* Virtually-indexed cache; no use for colors. */ break; #ifdef ENABLE_MIPS4_CACHE_R10K case MIPS_R10000: @@ -997,7 +993,7 @@ mips3_get_cache_config(int csizebase) (mci->mci_pdcache_size / mci->mci_pdcache_ways - 1) & -PAGE_SIZE; mci->mci_cache_prefer_mask = max(mci->mci_pdcache_size, mci->mci_picache_size) - 1; - uvmexp.ncolors = (mci->mci_cache_alias_mask >> PAGE_SHIFT) + 1; + uvmexp.ncolors = atop(max(mci->mci_cache_alias_mask, mci->mci_icache_alias_mask)) + 1; switch(MIPS_PRID_IMPL(cpu_id)) { #ifndef ENABLE_MIPS_R3NKK Index: sys/arch/mips/mips/pmap_machdep.c =================================================================== RCS file: /cvsroot/src/sys/arch/mips/mips/pmap_machdep.c,v retrieving revision 1.5 diff -u -p -r1.5 pmap_machdep.c --- sys/arch/mips/mips/pmap_machdep.c 22 Aug 2016 11:34:42 -0000 1.5 +++ sys/arch/mips/mips/pmap_machdep.c 4 Sep 2016 06:44:23 -0000 @@ -562,9 +572,9 @@ pmap_procwr(struct proc *p, vaddr_t va, if (p == curlwp->l_proc && mips_cache_info.mci_pdcache_way_mask < PAGE_SIZE) /* XXX check icache mask too? */ - mips_icache_sync_range(va, len); + mips_icache_sync_range((intptr_t)va, len); else - mips_icache_sync_range_index(va, len); + mips_icache_sync_range_index((intptr_t)va, len); } else { pmap_t pmap = p->p_vmspace->vm_map.pmap; kpreempt_disable(); @@ -637,13 +647,14 @@ pmap_copy_page(paddr_t src_pa, paddr_t d void pmap_md_page_syncicache(struct vm_page *pg, const kcpuset_t *onproc) { + UVMHIST_FUNC(__func__); UVMHIST_CALLED(pmaphist); struct mips_options * const opts = &mips_options; if (opts->mips_cpu_flags & CPU_MIPS_I_D_CACHE_COHERENT) return; struct vm_page_md * const mdpg = VM_PAGE_TO_MD(pg); pv_entry_t pv = &mdpg->mdpg_first; - const vaddr_t va = trunc_page(pv->pv_va); + const register_t va = (intptr_t)trunc_page(pv->pv_va); /* * If onproc is empty, we could do a @@ -898,17 +917,27 @@ pmap_md_vca_add(struct vm_page *pg, vadd * incompatible with the new mapping then they all will be. */ if (__predict_true(!mips_cache_badalias(pv->pv_va, va))) { + UVMHIST_LOG(pmaphist, "(not aliased pv_va %#lx va %#lx)", pv->pv_va, va, 0, 0); + return false; } - for (pv_entry_t npv = pv; npv; npv = npv->pv_next) { - if (npv->pv_va & PV_KENTER) + for (pv_entry_t npv = pv; npv && npv->pv_pmap;) { + UVMHIST_LOG(pmaphist, "(checking pv_va %#lx)", npv->pv_va, 0, 0, 0); + if (npv->pv_va & PV_KENTER) { + npv = npv->pv_next; continue; + } + UVMHIST_LOG(pmaphist, "(removing pv_va %#lx pmap %p)", npv->pv_va, npv->pv_pmap, 0, 0); vaddr_t nva = trunc_page(npv->pv_va); pmap_t npm = npv->pv_pmap; VM_PAGEMD_PVLIST_UNLOCK(mdpg); + /* XXX */ pmap_remove(npm, nva, nva + PAGE_SIZE); pmap_update(npm); (void)VM_PAGEMD_PVLIST_LOCK(mdpg); + + /* go round again */ + npv = pv; } return true; #else /* !PMAP_NO_PV_UNCACHED */ Index: sys/uvm/pmap/pmap.c =================================================================== RCS file: /cvsroot/src/sys/uvm/pmap/pmap.c,v retrieving revision 1.21 diff -u -p -r1.21 pmap.c --- sys/uvm/pmap/pmap.c 20 Aug 2016 20:09:47 -0000 1.21 +++ sys/uvm/pmap/pmap.c 4 Sep 2016 06:48:26 -0000 @@ -1309,6 +1317,8 @@ pmap_enter(pmap_t pmap, vaddr_t va, padd (pte_cached_p(npte) ? " (already exec)" : " (uncached)")); + pmap_page_syncicache(pg); + pmap_page_set_attributes(mdpg, VM_PAGEMD_EXECPAGE); } } else if (pg != NULL && (prot & VM_PROT_EXECUTE)) { KASSERT(mdpg != NULL); @@ -1799,8 +1809,10 @@ again: KASSERT(VM_PAGEMD_CACHED_P(mdpg)); // If the new mapping has an incompatible color the last // mapping of this page, clean the page before using it. + if (!PMAP_PAGE_COLOROK_P(va, pv->pv_va)) { pmap_md_vca_clean(pg, PMAP_WBINV); + /* XXX Execness */ } #endif pv->pv_pmap = pmap;