Index: sys/arch/sparc64/conf/GENERIC =================================================================== RCS file: /cvsroot/src/sys/arch/sparc64/conf/GENERIC,v retrieving revision 1.169 diff -u -r1.169 GENERIC --- sys/arch/sparc64/conf/GENERIC 24 Sep 2013 18:12:59 -0000 1.169 +++ sys/arch/sparc64/conf/GENERIC 15 Dec 2013 20:20:00 -0000 @@ -31,6 +31,7 @@ # Options for variants of the Sun SPARC architecure. options SUN4U # sun4u - UltraSPARC +options SUN4V # sun4v - UltraSPARC T1/T2+/T3/T4/T5 #options BLINK # blink the system LED #### System options that are the same for all ports Index: sys/arch/sparc64/conf/files.sparc64 =================================================================== RCS file: /cvsroot/src/sys/arch/sparc64/conf/files.sparc64,v retrieving revision 1.142 diff -u -r1.142 files.sparc64 --- sys/arch/sparc64/conf/files.sparc64 27 Aug 2013 13:11:12 -0000 1.142 +++ sys/arch/sparc64/conf/files.sparc64 15 Dec 2013 20:20:00 -0000 @@ -248,6 +248,7 @@ file arch/sparc64/sparc64/vm_machdep.c file arch/sparc64/sparc64/ipifuncs.c multiprocessor file arch/sparc64/sparc64/lock_stubs.s +file arch/sparc64/sparc64/hvcall.S sun4v file arch/sparc64/sparc64/db_interface.c ddb | kgdb file arch/sparc64/sparc64/db_machdep.c ddb Index: sys/arch/sparc64/dev/ebus_mainbus.c =================================================================== RCS file: /cvsroot/src/sys/arch/sparc64/dev/ebus_mainbus.c,v retrieving revision 1.11 diff -u -r1.11 ebus_mainbus.c --- sys/arch/sparc64/dev/ebus_mainbus.c 12 Sep 2013 19:51:09 -0000 1.11 +++ sys/arch/sparc64/dev/ebus_mainbus.c 15 Dec 2013 20:20:00 -0000 @@ -69,9 +69,11 @@ static bus_space_tag_t ebus_mainbus_alloc_bus_tag(struct ebus_softc *, bus_space_tag_t, int); #ifdef SUN4V +#if 0 +XXX static void ebus_mainbus_intr_ack(struct intrhand *); #endif - +#endif int ebus_mainbus_match(device_t parent, cfdata_t cf, void *aux) { @@ -280,6 +282,8 @@ int ino; #ifdef SUN4V +#if 0 +XXX if (CPU_ISSUN4V) { struct upa_reg reg; u_int64_t devhandle, devino = INTINO(ihandle); @@ -329,7 +333,7 @@ return (ih); } #endif - +#endif ihandle |= sc->sc_ign; ino = INTINO(ihandle); @@ -372,11 +376,12 @@ } #ifdef SUN4V - +#if 0 +XXX static void ebus_mainbus_intr_ack(struct intrhand *ih) { hv_intr_setstate(ih->ih_number, INTR_IDLE); } - +#endif #endif Index: sys/arch/sparc64/include/cpu.h =================================================================== RCS file: /cvsroot/src/sys/arch/sparc64/include/cpu.h,v retrieving revision 1.105 diff -u -r1.105 cpu.h --- sys/arch/sparc64/include/cpu.h 10 Nov 2013 00:50:13 -0000 1.105 +++ sys/arch/sparc64/include/cpu.h 15 Dec 2013 20:20:00 -0000 @@ -348,6 +348,9 @@ void sparc_softintr_schedule(void *); void sparc_softintr_disestablish(void *); +/* cpu.c */ +int cpu_myid(void); + /* disksubr.c */ struct dkbad; int isbad(struct dkbad *bt, int, int, int); Index: sys/arch/sparc64/include/ctlreg.h =================================================================== RCS file: /cvsroot/src/sys/arch/sparc64/include/ctlreg.h,v retrieving revision 1.59 diff -u -r1.59 ctlreg.h --- sys/arch/sparc64/include/ctlreg.h 8 Nov 2012 16:36:53 -0000 1.59 +++ sys/arch/sparc64/include/ctlreg.h 15 Dec 2013 20:20:01 -0000 @@ -663,6 +663,8 @@ SPARC64_LD_DEF(lduha, uint16_t, uint32_t) /* load unsigned int from alternate address space */ SPARC64_LD_DEF(lda, uint32_t, uint32_t) +/* load unsigned word from alternate address space */ +SPARC64_LD_DEF(lduwa, uint32_t, uint32_t) /* load signed int from alternate address space */ SPARC64_LD_DEF(ldswa, int, int) /* load 64-bit unsigned int from alternate address space */ Index: sys/arch/sparc64/include/param.h =================================================================== RCS file: /cvsroot/src/sys/arch/sparc64/include/param.h,v retrieving revision 1.51 diff -u -r1.51 param.h --- sys/arch/sparc64/include/param.h 3 Jan 2013 09:40:55 -0000 1.51 +++ sys/arch/sparc64/include/param.h 15 Dec 2013 20:20:01 -0000 @@ -230,9 +230,15 @@ extern int cputyp; +#if defined (SUN4US) || defined (SUN4V) #define CPU_ISSUN4U (cputyp == CPU_SUN4U) #define CPU_ISSUN4US (cputyp == CPU_SUN4US) #define CPU_ISSUN4V (cputyp == CPU_SUN4V) +#else +#define CPU_ISSUN4U (1) +#define CPU_ISSUN4US (0) +#define CPU_ISSUN4V (0) +#endif #endif /* _LOCORE */ #endif /* _KERNEL */ Index: sys/arch/sparc64/include/pte.h =================================================================== RCS file: /cvsroot/src/sys/arch/sparc64/include/pte.h,v retrieving revision 1.23 diff -u -r1.23 pte.h --- sys/arch/sparc64/include/pte.h 8 Dec 2013 14:41:28 -0000 1.23 +++ sys/arch/sparc64/include/pte.h 15 Dec 2013 20:20:01 -0000 @@ -176,7 +176,7 @@ #define TLB_REAL_W 0x0000000000000400LL /* #define TLB_TSB_LOCK 0x0000000000000200LL */ #define TLB_TSB_LOCK 0x0000000000001000LL -#define TLB_EXEC 0x0000000000000100LL +#define SUN4U_TLB_EXEC 0x0000000000000100LL #define TLB_EXEC_ONLY 0x0000000000000080LL /* H/W bits */ #define TLB_L 0x0000000000000040LL @@ -268,6 +268,8 @@ ((ie)?SUN4V_TLB_IE:0LL)) +#define TLB_EXEC (CPU_ISSUN4V ? SUN4V_TLB_EXEC : SUN4U_TLB_EXEC) + #define MMU_CACHE_VIRT 0x3 #define MMU_CACHE_PHYS 0x2 #define MMU_CACHE_NONE 0x0 Index: sys/arch/sparc64/sparc64/cpu.c =================================================================== RCS file: /cvsroot/src/sys/arch/sparc64/sparc64/cpu.c,v retrieving revision 1.105 diff -u -r1.105 cpu.c --- sys/arch/sparc64/sparc64/cpu.c 8 Nov 2013 15:44:26 -0000 1.105 +++ sys/arch/sparc64/sparc64/cpu.c 15 Dec 2013 20:20:01 -0000 @@ -73,6 +73,9 @@ #include #include +#ifdef SUN4V +#include +#endif int ecache_min_line_size; @@ -412,6 +415,37 @@ } +int +cpu_myid(void) +{ + char buf[32]; + int impl; + +#ifdef SUN4V + if (CPU_ISSUN4V) { + uint64_t myid; + hv_cpu_myid(&myid); + return myid; + } +#endif + if (OF_getprop(findroot(), "name", buf, sizeof(buf)) > 0 && + strcmp(buf, "SUNW,Ultra-Enterprise-10000") == 0) + return lduwa(0x1fff40000d0UL, ASI_PHYS_NON_CACHED); + impl = (getver() & VER_IMPL) >> VER_IMPL_SHIFT; + switch (impl) { + case IMPL_OLYMPUS_C: + case IMPL_JUPITER: + return CPU_JUPITERID; + case IMPL_CHEETAH: + case IMPL_CHEETAH_PLUS: + case IMPL_JAGUAR: + case IMPL_PANTHER: + return CPU_FIREPLANEID; + default: + return CPU_UPAID; + } +} + #if defined(MULTIPROCESSOR) vaddr_t cpu_spinup_trampoline; Index: sys/arch/sparc64/sparc64/pmap.c =================================================================== RCS file: /cvsroot/src/sys/arch/sparc64/sparc64/pmap.c,v retrieving revision 1.281 diff -u -r1.281 pmap.c --- sys/arch/sparc64/sparc64/pmap.c 11 Sep 2013 18:27:44 -0000 1.281 +++ sys/arch/sparc64/sparc64/pmap.c 15 Dec 2013 20:20:02 -0000 @@ -60,6 +60,9 @@ #include #include +#ifdef SUN4V +#include +#endif #ifdef DDB #include @@ -146,6 +149,10 @@ #define TSBENTS (512<ci_next = NULL; cpus->ci_curlwp = &lwp0; cpus->ci_flags = CPUF_PRIMARY; - cpus->ci_cpuid = CPU_UPAID; + cpus->ci_cpuid = cpu_myid(); cpus->ci_fplwp = NULL; cpus->ci_eintstack = NULL; cpus->ci_spinup = main; /* Call main when we're running. */ @@ -1233,6 +1240,26 @@ ci->ci_ctxbusy = curcpu()->ci_ctxbusy; } +#ifdef SUN4V + if (initial && CPU_ISSUN4V) { + tsb_desc = (struct tsb_desc *)kdata_alloc( + sizeof(struct tsb_desc), 16); + memset(tsb_desc, 0, sizeof(struct tsb_desc)); + /* 8K page size used for TSB index computation */ + tsb_desc->td_idxpgsz = 0; + tsb_desc->td_assoc = 1; + tsb_desc->td_size = TSBENTS; + tsb_desc->td_ctxidx = -1; + tsb_desc->td_pgsz = 0xf; + tsb_desc->td_pa = pmap_kextract((vaddr_t)ci->ci_tsb_dmmu); + BDPRINTF(PDB_BOOT1, ("cpu %d: TSB descriptor allocated at %p " + "size %08x - td_pa at %p\n", + ci->ci_index, tsb_desc, sizeof(struct tsb_desc), + tsb_desc->td_pa)); + + } +#endif + BDPRINTF(PDB_BOOT1, ("cpu %d: TSB allocated at %p/%p size %08x\n", ci->ci_index, ci->ci_tsb_dmmu, ci->ci_tsb_immu, TSBSIZE)); } @@ -1250,11 +1277,8 @@ * running for cpu0 yet.. */ ci->ci_pmap_next_ctx = 1; -#ifdef SUN4V -#error find out if we have 16 or 13 bit context ids -#else - ci->ci_numctx = 0x2000; /* all SUN4U use 13 bit contexts */ -#endif + /* all SUN4U use 13 bit contexts - SUN4V use at least 13 bit contexts */ + ci->ci_numctx = 0x2000; ctxsize = sizeof(paddr_t)*ci->ci_numctx; ci->ci_ctxbusy = (paddr_t *)kdata_alloc(ctxsize, sizeof(uint64_t)); memset(ci->ci_ctxbusy, 0, ctxsize);