Index: dev/pci/if_bge.c
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/if_bge.c,v
retrieving revision 1.201
diff -u -r1.201 if_bge.c
--- dev/pci/if_bge.c	22 Jul 2012 14:33:01 -0000	1.201
+++ dev/pci/if_bge.c	16 Sep 2012 13:47:11 -0000
@@ -564,6 +564,10 @@
 	  "Broadcom BCM57761 Fast Ethernet",
 	  },
 	{ PCI_VENDOR_BROADCOM,
+	  PCI_PRODUCT_BROADCOM_BCM57762,
+	  "Broadcom BCM57762 Gigabit Ethernet",
+	  },
+	{ PCI_VENDOR_BROADCOM,
 	  PCI_PRODUCT_BROADCOM_BCM57765,
 	  "Broadcom BCM57765 Fast Ethernet",
 	  },
@@ -728,6 +732,7 @@
 	{ BGE_ASICREV_BCM57780, "unknown BCM57780" },
 	{ BGE_ASICREV_BCM5717, "unknown BCM5717" },
 	{ BGE_ASICREV_BCM57765, "unknown BCM57765" },
+	{ BGE_ASICREV_BCM57766, "unknown BCM57766" },
 
 	{ 0, NULL }
 };
@@ -1969,7 +1974,23 @@
 #else
 
 	/* new broadcom docs strongly recommend these: */
-	if (!BGE_IS_5705_PLUS(sc)) {
+	if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5717 ||
+	    BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM57765 ||
+	    BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM57766) {
+		CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_READDMA_LOWAT, 0x0);
+		CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_MACRX_LOWAT, 0x2a);
+		CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_HIWAT, 0xa0);
+	} else if (BGE_IS_5705_PLUS(sc)) {
+		CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_READDMA_LOWAT, 0x0);
+
+		if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5906) {
+			CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_MACRX_LOWAT, 0x04);
+			CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_HIWAT, 0x10);
+		} else {
+			CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_MACRX_LOWAT, 0x10);
+			CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_HIWAT, 0x60);
+		}
+	} else if (!BGE_IS_5705_PLUS(sc)) {
 		if (ifp->if_mtu > ETHER_MAX_LEN) {
 			CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_READDMA_LOWAT, 0x50);
 			CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_MACRX_LOWAT, 0x20);
@@ -1979,10 +2000,6 @@
 			CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_MACRX_LOWAT, 152);
 			CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_HIWAT, 380);
 		}
-	} else if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5906) {
-		CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_READDMA_LOWAT, 0x0);
-		CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_MACRX_LOWAT, 0x04);
-		CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_HIWAT, 0x10);
 	} else {
 		CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_READDMA_LOWAT, 0x0);
 		CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_MACRX_LOWAT, 0x10);
@@ -2031,7 +2048,12 @@
 	/* Step 41: Initialize the standard RX ring control block */
 	rcb = &sc->bge_rdata->bge_info.bge_std_rx_rcb;
 	BGE_HOSTADDR(rcb->bge_hostaddr, BGE_RING_DMA_ADDR(sc, bge_rx_std_ring));
-	if (BGE_IS_5705_PLUS(sc))
+	if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5717 ||
+	    BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM57765 ||
+	    BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM57766)
+		rcb->bge_maxlen_flags = (BGE_RCB_MAXLEN_FLAGS(512, 0) |
+					(ETHER_MAX_DIX_LEN << 2));
+	else if (BGE_IS_5705_PLUS(sc))
 		rcb->bge_maxlen_flags = BGE_RCB_MAXLEN_FLAGS(512, 0);
 	else
 		rcb->bge_maxlen_flags =
@@ -2097,7 +2119,8 @@
 	CSR_WRITE_4(sc, BGE_RBDI_JUMBO_REPL_THRESH, BGE_JUMBO_RX_RING_CNT / 8);
 
 	if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5717 ||
-	    BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM57765) {
+	    BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM57765 ||
+	    BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM57766) {
 		CSR_WRITE_4(sc, BGE_STD_REPL_LWM, 4);
 		CSR_WRITE_4(sc, BGE_JUMBO_REPL_LWM, 4);
 	}
@@ -2603,6 +2626,7 @@
 			sc->bge_chipid = pci_conf_read(pc, pa->pa_tag,
 			    BGE_PCI_GEN2_PRODID_ASICREV);
 		else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_BROADCOM_BCM57761 ||
+			 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_BROADCOM_BCM57762 ||
 			 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_BROADCOM_BCM57765 ||
 			 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_BROADCOM_BCM57781 ||
 			 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_BROADCOM_BCM57785 ||
@@ -2651,6 +2675,7 @@
 	    BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5785 ||
 	    BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5787 ||
 	    BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM57765 ||
+	    BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM57766 ||
 	    BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM57780)
 		sc->bge_flags |= BGE_5755_PLUS;
 
@@ -2751,6 +2776,7 @@
 	    BGE_ASICREV(sc->bge_chipid) != BGE_ASICREV_BCM5717 &&
 	    BGE_ASICREV(sc->bge_chipid) != BGE_ASICREV_BCM5785 &&
 	    BGE_ASICREV(sc->bge_chipid) != BGE_ASICREV_BCM57765 &&
+	    BGE_ASICREV(sc->bge_chipid) != BGE_ASICREV_BCM57766 &&
 	    BGE_ASICREV(sc->bge_chipid) != BGE_ASICREV_BCM57780) {
 		if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5755 ||
 		    BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5761 ||
@@ -2904,9 +2930,15 @@
 			    "setting short Tx thresholds\n");
 	}
 
-	if (BGE_IS_5705_PLUS(sc))
-		sc->bge_return_ring_cnt = BGE_RETURN_RING_CNT_5705;
-	else
+
+	if (BGE_IS_5705_PLUS(sc)) {
+		if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5717 ||
+		    BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM57765 ||
+		    BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM57766)
+			sc->bge_return_ring_cnt = BGE_RETURN_RING_CNT;
+		else
+			sc->bge_return_ring_cnt = BGE_RETURN_RING_CNT_5705;
+	} else
 		sc->bge_return_ring_cnt = BGE_RETURN_RING_CNT;
 
 	/* Set up ifnet structure */
@@ -3297,7 +3329,8 @@
 	    sc->bge_chipid != BGE_CHIPID_BCM5750_A0 &&
 	    BGE_ASICREV(sc->bge_chipid) != BGE_ASICREV_BCM5717 &&
 	    BGE_ASICREV(sc->bge_chipid) != BGE_ASICREV_BCM5785 &&
-	    BGE_ASICREV(sc->bge_chipid) != BGE_ASICREV_BCM57765) {
+	    BGE_ASICREV(sc->bge_chipid) != BGE_ASICREV_BCM57765 &&
+	    BGE_ASICREV(sc->bge_chipid) != BGE_ASICREV_BCM57766) {
 		uint32_t v;
 
 		/* Enable PCI Express bug fix */
Index: dev/pci/if_bgereg.h
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/if_bgereg.h,v
retrieving revision 1.56
diff -u -r1.56 if_bgereg.h
--- dev/pci/if_bgereg.h	3 Feb 2010 15:36:36 -0000	1.56
+++ dev/pci/if_bgereg.h	16 Sep 2012 13:47:15 -0000
@@ -318,6 +318,7 @@
 #define BGE_CHIPID_BCM5787_A2		0xb002
 #define BGE_CHIPID_BCM5906_A1		0xc001
 #define BGE_CHIPID_BCM5906_A2		0xc002
+#define BGE_CHIPID_BCM57762		0x57766000
 #define BGE_CHIPID_BCM57780_A0		0x57780000
 #define BGE_CHIPID_BCM57780_A1		0x57780001
 
@@ -344,6 +345,7 @@
 #define BGE_ASICREV_BCM57780		0x57780
 #define BGE_ASICREV_BCM5717		0x5717
 #define BGE_ASICREV_BCM57765		0x57785
+#define BGE_ASICREV_BCM57766		0x57766
 
 /* chip revisions */
 #define BGE_CHIPREV(x)			((x) >> 8)
@@ -2383,3 +2385,10 @@
 #define BGE_5714_FAMILY		0x01000000
 #define BGE_5700_FAMILY		0x02000000
 #define BGE_TSO			0x04000000
+
+/*
+ * Maximum DIX frame length
+ * In OpenBSD's sys/netinet/if_ether.h, this is 1536,
+ * but it should be 1526.
+ */
+#define ETHER_MAX_DIX_LEN	1526
Index: dev/pci/pcidevs
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/pcidevs,v
retrieving revision 1.1133
diff -u -r1.1133 pcidevs
--- dev/pci/pcidevs	13 Sep 2012 12:11:06 -0000	1.1133
+++ dev/pci/pcidevs	16 Sep 2012 13:47:26 -0000
@@ -1592,6 +1592,7 @@
 product BROADCOM BCM5787F	0x167f	BCM5787F 10/100 Ethernet
 product BROADCOM BCM5761E	0x1680	BCM5761E 10/100/1000 Ethernet
 product BROADCOM BCM5761	0x1681	BCM5761 10/100/1000 Ethernet
+product BROADCOM BCM57762	0x1682	BCM57762 Gigabit Ethernet
 product BROADCOM BCM5764	0x1684	BCM5764 NetXtreme 1000baseT Ethernet
 product BROADCOM BCM5761S	0x1688	BCM5761S 10/100/1000 Ethernet
 product BROADCOM BCM5761SE	0x1689	BCM5761SE 10/100/1000 Ethernet
Index: dev/mii/miidevs
===================================================================
RCS file: /cvsroot/src/sys/dev/mii/miidevs,v
retrieving revision 1.108
diff -u -r1.108 miidevs
--- dev/mii/miidevs	15 Jul 2012 07:30:57 -0000	1.108
+++ dev/mii/miidevs	16 Sep 2012 13:47:27 -0000
@@ -56,6 +56,7 @@
 oui ATTANSIC			0x00c82e	Attansic Technology
 oui BROADCOM			0x001018	Broadcom Corporation
 oui BROADCOM2			0x000af7	Broadcom Corporation
+oui BROADCOM3			0x001be9	Broadcom Corporation
 oui CICADA			0x0003F1	Cicada Semiconductor
 oui DAVICOM			0x00606e	Davicom Semiconductor
 oui ENABLESEMI			0x0010dd	Enable Semiconductor
@@ -179,6 +180,7 @@
 model BROADCOM2 BCM5709C	0x003c BCM5709 10/100/1000baseT PHY
 model BROADCOM2 BCM5761		0x003d BCM5761 10/100/1000baseT PHY
 model BROADCOM2 BCM5709S	0x003f BCM5709S 1000/2500baseSX PHY
+model BROADCOM3 BCM57765	0x0024 BCM57765 1000BASE-T media interface
 model xxBROADCOM_ALT1 BCM5906	0x0004 BCM5906 10/100baseTX media interface
  
 /* Cicada Semiconductor PHYs (now owned by Vitesse?) */
Index: dev/mii/brgphy.c
===================================================================
RCS file: /cvsroot/src/sys/dev/mii/brgphy.c,v
retrieving revision 1.59
diff -u -r1.59 brgphy.c
--- dev/mii/brgphy.c	7 Jun 2011 10:10:44 -0000	1.59
+++ dev/mii/brgphy.c	16 Sep 2012 13:47:27 -0000
@@ -205,6 +205,9 @@
 	{ MII_OUI_BROADCOM2,		MII_MODEL_BROADCOM2_BCM5785,
 	  MII_STR_BROADCOM2_BCM5785 },
 
+	{ MII_OUI_BROADCOM3,		MII_MODEL_BROADCOM3_BCM57765,
+	  MII_STR_BROADCOM3_BCM57765 },
+
 	{ MII_OUI_xxBROADCOM_ALT1,	MII_MODEL_xxBROADCOM_ALT1_BCM5906,
 	  MII_STR_xxBROADCOM_ALT1_BCM5906 },