Index: sys/arch/sparc64/include/psl.h =================================================================== RCS file: /cvsroot/src/sys/arch/sparc64/include/psl.h,v retrieving revision 1.57 diff -u -r1.57 psl.h --- sys/arch/sparc64/include/psl.h 18 May 2016 07:59:30 -0000 1.57 +++ sys/arch/sparc64/include/psl.h 20 May 2018 21:36:28 -0000 @@ -383,6 +383,9 @@ SPARC64_RDASR64_DEF(stick, STICK) /* getstick() */ SPARC64_WRASR64_DEF(stick, STICK) /* setstick() */ +/* System Tick Compare Register (ASR 25) */ +SPARC64_RDASR64_DEF(stickcmpr, STICK_CMPR) /* getstickcmpr() */ + /* Some simple macros to check the cpu type. */ #define GETVER_CPU_MASK() ((getver() & VER_MASK) >> VER_MASK_SHIFT) #define GETVER_CPU_IMPL() ((getver() & VER_IMPL) >> VER_IMPL_SHIFT) Index: sys/arch/sparc64/sparc64/clock.c =================================================================== RCS file: /cvsroot/src/sys/arch/sparc64/sparc64/clock.c,v retrieving revision 1.120 diff -u -r1.120 clock.c --- sys/arch/sparc64/sparc64/clock.c 7 Jul 2016 06:55:38 -0000 1.120 +++ sys/arch/sparc64/sparc64/clock.c 20 May 2018 21:36:28 -0000 @@ -100,6 +100,8 @@ #include #endif +#define STICK_VALUE(x) (x & ~(1L<<63)) + /* * Clock assignments: * @@ -406,7 +408,25 @@ ci->ci_tick_increment = ci->ci_system_clockrate[0] / hz; s = intr_disable(); - next_stick(ci->ci_tick_increment); + + /* + * Setup STICK_CMPR so a trap is generated when STICK reaches + * the required value. + * Ensure that next_stick() results in a sane STICK_CMPR value, + * in other words STICK_CMPR > STICK. + * The opposite scenario (STICK < STICK_CMPR) has been observed + * on a sun4v SPARC T5-2 system when running NetBSD in a ldom. + * Here the initial call to next_stick() takes beween 2-3 seconds. + */ + + uint64_t stick_after; + uint64_t stickcmpr; + do { + next_stick(ci->ci_tick_increment); + stick_after = STICK_VALUE(getstick()); + stickcmpr = getstickcmpr(); + } while (stickcmpr < stick_after); + intr_restore(s); }