Index: svwsata.c =================================================================== RCS file: /cvsroot/src/sys/dev/pci/svwsata.c,v retrieving revision 1.14 diff -p -r1.14 svwsata.c *** svwsata.c 2 Jul 2012 18:15:48 -0000 1.14 --- svwsata.c 4 Jul 2012 20:13:24 -0000 *************** __KERNEL_RCSID(0, "$NetBSD: svwsata.c,v *** 21,26 **** --- 21,27 ---- #include #include + #include #include #include *************** svwsata_chip_map(struct pciide_softc *sc *** 144,152 **** sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; sc->sc_wdcdev.sc_atac.atac_udma_cap = 6; } ! ! sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray; ! sc->sc_wdcdev.sc_atac.atac_nchannels = 4; sc->sc_wdcdev.sc_atac.atac_set_modes = sata_setup_channel; /* We can use SControl and SStatus to probe for drives. */ --- 145,162 ---- sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; sc->sc_wdcdev.sc_atac.atac_udma_cap = 6; } ! if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SERVERWORKS_FRODO4_SATA) { ! /* ! * Frodo4 has 8 ports. Frodo8 has 4 ports. ??? ! */ ! sc->sc_wdcdev.sc_atac.atac_nchannels = 8; ! sc->sc_wdcdev.sc_atac.atac_channels = ! kmem_alloc(sizeof(*sc->sc_wdcdev.sc_atac.atac_channels) * ! sc->sc_wdcdev.sc_atac.atac_nchannels, KM_SLEEP); ! } else { ! sc->sc_wdcdev.sc_atac.atac_nchannels = 4; ! sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray; ! } sc->sc_wdcdev.sc_atac.atac_set_modes = sata_setup_channel; /* We can use SControl and SStatus to probe for drives. */ *************** svwsata_chip_map(struct pciide_softc *sc *** 191,196 **** --- 201,211 ---- } } + /* + * detach should free atac_channels if + * sc->sc_wdcdev.sc_atac.atac_channels == sc->wdc_chanarray + */ + static void svwsata_mapreg_dma(struct pciide_softc *sc, const struct pci_attach_args *pa) { *************** svwsata_mapreg_dma(struct pciide_softc * *** 217,223 **** */ sc->sc_dma_iot = sc->sc_ba5_st; ! for (chan = 0; chan < 4; chan++) { pc = &sc->pciide_channels[chan]; for (reg = 0; reg < IDEDMA_NREGS; reg++) { size = 4; --- 232,238 ---- */ sc->sc_dma_iot = sc->sc_ba5_st; ! for (chan = 0; chan < sc->sc_wdcdev.sc_atac.atac_nchannels; chan++) { pc = &sc->pciide_channels[chan]; for (reg = 0; reg < IDEDMA_NREGS; reg++) { size = 4;