Index: dev/auxio.c
===================================================================
RCS file: /cvsroot/src/sys/arch/sparc64/dev/auxio.c,v
retrieving revision 1.22
diff -p -r1.22 auxio.c
*** dev/auxio.c	2 Jun 2011 00:24:23 -0000	1.22
--- dev/auxio.c	25 Mar 2012 08:35:24 -0000
*************** __KERNEL_RCSID(0, "$NetBSD: auxio.c,v 1.
*** 62,67 ****
--- 62,69 ----
  struct auxio_softc {
  	device_t		sc_dev;
  
+ 	kmutex_t		sc_lock;
+ 
  	/* parent's tag */
  	bus_space_tag_t		sc_tag;
  
*************** static void
*** 105,117 ****
  auxio_blink(void *x)
  {
  	struct auxio_softc *sc = x;
- 	int s;
  	uint32_t led;
  
  	if (do_blink == 0)
  		return;
  
! 	s = splhigh();
  	if (sc->sc_flags & AUXIO_EBUS)
  		led = le32toh(bus_space_read_4(sc->sc_tag, sc->sc_led, 0));
  	else
--- 107,118 ----
  auxio_blink(void *x)
  {
  	struct auxio_softc *sc = x;
  	uint32_t led;
  
  	if (do_blink == 0)
  		return;
  
! 	mutex_enter(&sc->sc_lock);
  	if (sc->sc_flags & AUXIO_EBUS)
  		led = le32toh(bus_space_read_4(sc->sc_tag, sc->sc_led, 0));
  	else
*************** auxio_blink(void *x)
*** 122,128 ****
  		bus_space_write_4(sc->sc_tag, sc->sc_led, 0, htole32(led));
  	else
  		bus_space_write_1(sc->sc_tag, sc->sc_led, 0, led);
! 	splx(s);
  
  	/*
  	 * Blink rate is:
--- 123,129 ----
  		bus_space_write_4(sc->sc_tag, sc->sc_led, 0, htole32(led));
  	else
  		bus_space_write_1(sc->sc_tag, sc->sc_led, 0, led);
! 	mutex_exit(&sc->sc_lock);
  
  	/*
  	 * Blink rate is:
*************** auxio_attach_common(struct auxio_softc *
*** 144,150 ****
  
  	/* only start one blinker */
  	if (do_once) {
! 		callout_init(&blink_ch, 0);
  		auxio_blink(sc);
  		do_once = 0;
  	}
--- 145,152 ----
  
  	/* only start one blinker */
  	if (do_once) {
! 		mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_HIGH);
! 		callout_init(&blink_ch, CALLOUT_MPSAFE);
  		auxio_blink(sc);
  		do_once = 0;
  	}
*************** auxio_fd_control(u_int32_t bits)
*** 268,273 ****
--- 270,277 ----
  	 * We'll assume the floppy drive is tied to first auxio found.
  	 */
  	sc = device_lookup_private(&auxio_cd, 0);
+ 	KASSERT(sc);
+ 	mutex_enter(&sc->sc_lock);
  	if (sc->sc_flags & AUXIO_EBUS)
  		led = le32toh(bus_space_read_4(sc->sc_tag, sc->sc_led, 0));
  	else
*************** auxio_fd_control(u_int32_t bits)
*** 279,284 ****
--- 283,289 ----
  		bus_space_write_4(sc->sc_tag, sc->sc_led, 0, htole32(led));
  	else
  		bus_space_write_1(sc->sc_tag, sc->sc_led, 0, led);
+ 	mutex_exit(&sc->sc_lock);
  
  	return 0;
  }
Index: dev/iommu.c
===================================================================
RCS file: /cvsroot/src/sys/arch/sparc64/dev/iommu.c,v
retrieving revision 1.107
diff -p -r1.107 iommu.c
*** dev/iommu.c	25 Mar 2012 03:51:33 -0000	1.107
--- dev/iommu.c	25 Mar 2012 08:35:24 -0000
*************** iommu_dvmamap_unload(bus_dma_tag_t t, bu
*** 660,669 ****
  #endif
  	}
  #endif
- 	iommu_remove(is, map->_dm_dvmastart, map->_dm_dvmasize);
  
! 	/* Flush the caches */
! 	bus_dmamap_unload(t->_parent, map);
  
  	mutex_enter(&is->is_lock);
  	error = extent_free(is->is_dvmamap, map->_dm_dvmastart,
--- 660,680 ----
  #endif
  	}
  #endif
  
! 	if (is->is_flags & IOMMU_SYNC_BEFORE_UNMAP) {
! 
! 		/* Flush the caches */
! 		bus_dmamap_unload(t->_parent, map);
! 
! 		iommu_remove(is, map->_dm_dvmastart, map->_dm_dvmasize);
! 
! 	} else {
! 
! 		iommu_remove(is, map->_dm_dvmastart, map->_dm_dvmasize);
! 
! 		/* Flush the caches */
! 		bus_dmamap_unload(t->_parent, map);
! 	}
  
  	mutex_enter(&is->is_lock);
  	error = extent_free(is->is_dvmamap, map->_dm_dvmastart,
Index: dev/iommuvar.h
===================================================================
RCS file: /cvsroot/src/sys/arch/sparc64/dev/iommuvar.h,v
retrieving revision 1.21
diff -p -r1.21 iommuvar.h
*** dev/iommuvar.h	25 Mar 2012 03:51:33 -0000	1.21
--- dev/iommuvar.h	25 Mar 2012 08:35:24 -0000
*************** struct iommu_state {
*** 59,64 ****
--- 59,65 ----
  	int			is_flags;
  #define IOMMU_FLUSH_CACHE	0x00000001
  #define IOMMU_TSBSIZE_IN_PTSB	0x00000002	/* PCIe */
+ #define IOMMU_SYNC_BEFORE_UNMAP	0x00000004
  
  	struct strbuf_ctl	*is_sb[2];	/* Streaming buffers if any */
  
Index: dev/mkclock.c
===================================================================
RCS file: /cvsroot/src/sys/arch/sparc64/dev/mkclock.c,v
retrieving revision 1.9
diff -p -r1.9 mkclock.c
*** dev/mkclock.c	29 Jul 2011 08:37:36 -0000	1.9
--- dev/mkclock.c	25 Mar 2012 08:35:24 -0000
*************** mkclock_wenable(struct todr_chip_handle 
*** 273,278 ****
--- 273,279 ----
  	int s, err = 0;
  	static int writers;
  
+ 	/* XXXSMP */
  	s = splhigh();
  	if (onoff)
  		prot = writers++ == 0 ? VM_PROT_READ|VM_PROT_WRITE : 0;
Index: dev/pci_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/sparc64/dev/pci_machdep.c,v
retrieving revision 1.74
diff -p -r1.74 pci_machdep.c
*** dev/pci_machdep.c	12 Aug 2011 06:04:41 -0000	1.74
--- dev/pci_machdep.c	25 Mar 2012 08:35:24 -0000
*************** __KERNEL_RCSID(0, "$NetBSD: pci_machdep.
*** 39,45 ****
  #include <sys/systm.h>
  #include <sys/errno.h>
  #include <sys/device.h>
! #include <sys/malloc.h>
  
  #define _SPARC_BUS_DMA_PRIVATE
  #include <sys/bus.h>
--- 39,45 ----
  #include <sys/systm.h>
  #include <sys/errno.h>
  #include <sys/device.h>
! #include <sys/kmem.h>
  
  #define _SPARC_BUS_DMA_PRIVATE
  #include <sys/bus.h>
*************** sparc64_pci_enumerate_bus(struct pci_sof
*** 367,377 ****
  }
  
  const char *
! pci_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih)
  {
  	static char str[16];
  
! 	sprintf(str, "ivec %x", ih);
  	DPRINTF(SPDB_INTR, ("pci_intr_string: returning %s\n", str));
  
  	return (str);
--- 367,377 ----
  }
  
  const char *
! pci_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t pih)
  {
  	static char str[16];
  
! 	sprintf(str, "ivec %x", pih->pih_ivec);
  	DPRINTF(SPDB_INTR, ("pci_intr_string: returning %s\n", str));
  
  	return (str);
*************** pci_intr_map(const struct pci_attach_arg
*** 443,449 ****
  			break;
  		}
  
! 	*ihp = int_used;
  
  	/* Call the sub-driver is necessary */
  	if (pa->pa_pc->spc_intr_map)
--- 443,456 ----
  			break;
  		}
  
! 	/*
! 	 * XXX should make sure we don't leak these, but we don't
! 	 * do disestablish properly yet anyway
! 	 */
! 	*ihp = kmem_zalloc(sizeof **ihp, KM_NOSLEEP);
! 	if (!*ihp)
! 		return ENOMEM;
! 	(*ihp)->pih_ivec = int_used;
  
  	/* Call the sub-driver is necessary */
  	if (pa->pa_pc->spc_intr_map)
Index: dev/psycho.c
===================================================================
RCS file: /cvsroot/src/sys/arch/sparc64/dev/psycho.c,v
retrieving revision 1.112
diff -p -r1.112 psycho.c
*** dev/psycho.c	27 Jan 2012 18:53:03 -0000	1.112
--- dev/psycho.c	25 Mar 2012 08:35:24 -0000
*************** static void	*psycho_pci_intr_establish(p
*** 120,126 ****
  					   pci_intr_handle_t,
  					   int, int (*)(void *), void *);
  static int	psycho_pci_find_ino(const struct pci_attach_args *,
! 				    pci_intr_handle_t *);
  
  /* Interrupt handlers */
  static int psycho_ue(void *);
--- 120,126 ----
  					   pci_intr_handle_t,
  					   int, int (*)(void *), void *);
  static int	psycho_pci_find_ino(const struct pci_attach_args *,
! 				    u_int *);
  
  /* Interrupt handlers */
  static int psycho_ue(void *);
*************** psycho_pci_conf_write(pci_chipset_tag_t 
*** 1398,1418 ****
  }
  
  static void *
! psycho_pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level,
  	int (*func)(void *), void *arg)
  {
  	void *cookie;
  	struct psycho_pbm *pp = (struct psycho_pbm *)pc->cookie;
  
! 	DPRINTF(PDB_INTR, ("%s: ih %lx; level %d", __func__, (u_long)ih, level));
! 	cookie = bus_intr_establish(pp->pp_memt, ih, level, func, arg);
  
  	DPRINTF(PDB_INTR, ("; returning handle %p\n", cookie));
  	return (cookie);
  }
  
  static int
! psycho_pci_find_ino(const struct pci_attach_args *pa, pci_intr_handle_t *ihp)
  {
  	struct psycho_pbm *pp = pa->pa_pc->cookie;
  	struct psycho_softc *sc = pp->pp_sc;
--- 1398,1418 ----
  }
  
  static void *
! psycho_pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t pih, int level,
  	int (*func)(void *), void *arg)
  {
  	void *cookie;
  	struct psycho_pbm *pp = (struct psycho_pbm *)pc->cookie;
  
! 	DPRINTF(PDB_INTR, ("%s: ih %x; level %d", __func__, pih->pih_ivec, level));
! 	cookie = bus_intr_establish(pp->pp_memt, pih->pih_ivec, level, func, arg);
  
  	DPRINTF(PDB_INTR, ("; returning handle %p\n", cookie));
  	return (cookie);
  }
  
  static int
! psycho_pci_find_ino(const struct pci_attach_args *pa, u_int *ino)
  {
  	struct psycho_pbm *pp = pa->pa_pc->cookie;
  	struct psycho_softc *sc = pp->pp_sc;
*************** psycho_pci_find_ino(const struct pci_att
*** 1452,1458 ****
  	DPRINTF(PDB_INTMAP, ("%s: mode %d, pbm %d, dev %d, pin %d\n", __func__,
  	    sc->sc_mode, pp->pp_id, dev, pin));
  
! 	*ihp = sc->sc_ign | ((bus << 4) & INTMAP_PCIBUS) |
  	    ((dev << 2) & INTMAP_PCISLOT) | (pin & INTMAP_PCIINT);
  
  	return (0);
--- 1452,1458 ----
  	DPRINTF(PDB_INTMAP, ("%s: mode %d, pbm %d, dev %d, pin %d\n", __func__,
  	    sc->sc_mode, pp->pp_id, dev, pin));
  
! 	*ino = sc->sc_ign | ((bus << 4) & INTMAP_PCIBUS) |
  	    ((dev << 2) & INTMAP_PCISLOT) | (pin & INTMAP_PCIINT);
  
  	return (0);
Index: dev/pyro.c
===================================================================
RCS file: /cvsroot/src/sys/arch/sparc64/dev/pyro.c,v
retrieving revision 1.11
diff -p -r1.11 pyro.c
*** dev/pyro.c	18 Mar 2012 05:26:58 -0000	1.11
--- dev/pyro.c	25 Mar 2012 08:35:24 -0000
*************** pyro_intr_map(const struct pci_attach_ar
*** 329,337 ****
  	struct pyro_softc *sc = pp->pp_sc;
  	u_int dev;
  
! 	if (*ihp != (pci_intr_handle_t)-1) {
! 		*ihp |= sc->sc_ign;
! 		DPRINTF(PDB_INTR, ("%s: not -1 -> ih %lx\n", __func__, (u_long)*ihp));
  		return (0);
  	}
  
--- 329,337 ----
  	struct pyro_softc *sc = pp->pp_sc;
  	u_int dev;
  
! 	if ((*ihp)->pih_ivec != -1) {
! 		(*ihp)->pih_ivec |= sc->sc_ign;
! 		DPRINTF(PDB_INTR, ("%s: not -1 -> ih %x\n", __func__, (*ihp)->pih_ivec));
  		return (0);
  	}
  
*************** pyro_intr_map(const struct pci_attach_ar
*** 353,363 ****
  	 */
  	dev = pa->pa_device - 1;
  
! 	*ihp = (pa->pa_intrpin - 1) & INTMAP_PCIINT;
! 	*ihp |= (dev << 2) & INTMAP_PCISLOT;
! 	*ihp |= sc->sc_ign;
  
! 	DPRINTF(PDB_INTR, ("%s: weird hack -> ih %lx\n", __func__, (u_long)*ihp));
  	return (0);
  }
  
--- 353,363 ----
  	 */
  	dev = pa->pa_device - 1;
  
! 	(*ihp)->pih_ivec = ((pa->pa_intrpin - 1) & INTMAP_PCIINT) |
! 	                   ((dev << 2) & INTMAP_PCISLOT) |
! 			   sc->sc_ign;
  
! 	DPRINTF(PDB_INTR, ("%s: weird hack -> ih %x\n", __func__, (*ihp)->pih_ivec));
  	return (0);
  }
  
*************** pyro_intr_establish(bus_space_tag_t t, i
*** 622,635 ****
  }
  
  static void *
! pyro_pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level,
  	int (*func)(void *), void *arg)
  {
  	void *cookie;
  	struct pyro_pbm *pbm = (struct pyro_pbm *)pc->cookie;
  
! 	DPRINTF(PDB_INTR, ("%s: ih %lx; level %d\n", __func__, (u_long)ih, level));
! 	cookie = bus_intr_establish(pbm->pp_memt, ih, level, func, arg);
  
  	DPRINTF(PDB_INTR, ("%s: returning handle %p\n", __func__, cookie));
  	return (cookie);
--- 622,635 ----
  }
  
  static void *
! pyro_pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t pih, int level,
  	int (*func)(void *), void *arg)
  {
  	void *cookie;
  	struct pyro_pbm *pbm = (struct pyro_pbm *)pc->cookie;
  
! 	DPRINTF(PDB_INTR, ("%s: ih %x; level %d\n", __func__, pih->pih_ivec, level));
! 	cookie = bus_intr_establish(pbm->pp_memt, pih->pih_ivec, level, func, arg);
  
  	DPRINTF(PDB_INTR, ("%s: returning handle %p\n", __func__, cookie));
  	return (cookie);
Index: dev/schizo.c
===================================================================
RCS file: /cvsroot/src/sys/arch/sparc64/dev/schizo.c,v
retrieving revision 1.29
diff -p -r1.29 schizo.c
*** dev/schizo.c	25 Mar 2012 03:13:08 -0000	1.29
--- dev/schizo.c	25 Mar 2012 08:35:24 -0000
*************** schizo_attach(struct device *parent, str
*** 241,246 ****
--- 241,248 ----
  	}
  
  	aprint_normal_dev(sc->sc_dev, " ");
+ 	if (sc->sc_tomatillo)
+ 		is->is_flags |= IOMMU_SYNC_BEFORE_UNMAP;
  	schizo_init_iommu(sc, pbm);
  
  	pbm->sp_memt = schizo_alloc_mem_tag(pbm);
*************** schizo_attach(struct device *parent, str
*** 330,335 ****
--- 332,343 ----
  			      TOM_IOCACHE_CSR_PEN_ONE |
  			      TOM_IOCACHE_CSR_PEN_LINE;
  		schizo_pbm_write(pbm, SCZ_PCI_IOCACHE_CSR, iocache_csr);
+ 
+ 		/*
+ 		 * Check if we need to handle Tomatillo erratum #72
+ 		 */
+ 		if (sc->sc_ver <= 4)
+ 			tomatillo_extra_blk_commit = true;
  	}
  
  	config_found(sc->sc_dev, &pba, schizo_print);
*************** schizo_pci_intr_map(const struct pci_att
*** 743,753 ****
  	struct schizo_pbm *pbm = pa->pa_pc->cookie;
  	struct schizo_softc *sc = pbm->sp_sc;
  
! 	*ihp |= sc->sc_ign;
! 	DPRINTF(SDB_INTMAP, ("returning IGN adjusted to %x\n", *ihp));
  	return (0);
  }
  
  static void *
  schizo_intr_establish(bus_space_tag_t t, int ihandle, int level,
  	int (*handler)(void *), void *arg, void (*fastvec)(void) /* ignored */)
--- 751,821 ----
  	struct schizo_pbm *pbm = pa->pa_pc->cookie;
  	struct schizo_softc *sc = pbm->sp_sc;
  
! 	(*ihp)->pih_ivec |= sc->sc_ign;
! 	(*ihp)->pih_pbm = pbm;
! 	(*ihp)->pih_pbm2 = pbm;
! 
! 	DPRINTF(SDB_INTMAP, ("returning IGN adjusted to %x\n", (*ihp)->pih_ivec));
  	return (0);
  }
  
+ /*
+  * Wrapper so we can poke the DMA flush/sync registers.
+  */
+ static int schizo_pci_intr(void *arg);
+ 
+ static int
+ schizo_pci_intr(void *arg)
+ {
+ 	pci_intr_handle_t pih = arg;
+ 	struct schizo_pbm *pbm = pih->pih_pbm;
+ 	struct schizo_softc *sc = pbm->sp_sc;
+ 	struct intrhand *ih = pih->pih_ih;
+ 
+ 	KASSERT(pih->pih_func);
+ 
+ 	/* XXX XMITS is different again here */
+ 	if (sc->sc_tomatillo) {
+ 		int s, i;
+ 		uint64_t ino_mask;
+ 		uint64_t sync_set;
+ 
+ 		/* initiate a read */
+ 		(void)schizo_cfg_read(pbm, 0);
+ 
+ 		/* write the ino mask */
+ 		ino_mask = 1ULL << INTINO(ih->ih_ivec);
+ 		s = intr_disable();
+ 		schizo_pbm_write(pbm, TOM_PCI_DMA_FLUSH_PENDING, ino_mask);
+ 		intr_restore(s);
+ 
+ 		/* check hw busy -- with timeout->panic (solaris uses 1ns? only) */
+ 		for (i = 0; i < 1000; i++) {
+ 
+ 			s = intr_disable();
+ 			sync_set = schizo_pbm_readintr(pbm, TOM_PCI_DMA_FLUSH_PENDING);
+ 			intr_restore(s);
+ 			if ((sync_set & ino_mask) != 0)
+ 				break;
+ 		}
+ 
+ 		if ((sync_set & ino_mask) == 0)
+ 			panic("%s: ino sync time out on %s: ino %x",
+ 			      __func__, ih->ih_name, (uint32_t)INTINO(ih->ih_ivec));
+ 
+ 		/* handle tomatillo errata #78 */
+ 		if (tomatillo_extra_blk_commit) {
+ 			static char buf[64];
+ 
+ 			// check fpstate?
+ 			kpreempt_disable();
+ 			extra_blk_commit(buf);
+ 			kpreempt_enable();
+ 		}
+ 	}
+ 	return (*pih->pih_func)(pih->pih_arg);
+ }
+ 
  static void *
  schizo_intr_establish(bus_space_tag_t t, int ihandle, int level,
  	int (*handler)(void *), void *arg, void (*fastvec)(void) /* ignored */)
*************** schizo_intr_establish(bus_space_tag_t t,
*** 840,853 ****
  }
  
  static void *
! schizo_pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level,
  	int (*func)(void *), void *arg)
  {
  	void *cookie;
  	struct schizo_pbm *pbm = (struct schizo_pbm *)pc->cookie;
  
! 	DPRINTF(SDB_INTR, ("%s: ih %lx; level %d", __func__, (u_long)ih, level));
! 	cookie = bus_intr_establish(pbm->sp_memt, ih, level, func, arg);
  
  	DPRINTF(SDB_INTR, ("; returning handle %p\n", cookie));
  	return (cookie);
--- 908,932 ----
  }
  
  static void *
! schizo_pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t pih, int level,
  	int (*func)(void *), void *arg)
  {
  	void *cookie;
  	struct schizo_pbm *pbm = (struct schizo_pbm *)pc->cookie;
  
! 	/*
! 	 * Prepare some redirection so we can handle DMA flush/sync.
! 	 */
! 	pih->pih_func = func;
! 	pih->pih_arg = arg;
! 
! 	DPRINTF(SDB_INTR, ("%s: ih %x; level %d", __func__, pih->pih_ivec, level));
! 	cookie = bus_intr_establish(pbm->sp_memt, pih->pih_ivec, level, schizo_pci_intr, pih);
! 
! 	/* We know we returned an intrhand in schizo_intr_establish() */
! 	pih->pih_ih = cookie;
! 	KASSERT(pih->pih_pbm == pbm);
! 	KASSERT(pih->pih_pbm2 == pbm);
  
  	DPRINTF(SDB_INTR, ("; returning handle %p\n", cookie));
  	return (cookie);
Index: dev/schizoreg.h
===================================================================
RCS file: /cvsroot/src/sys/arch/sparc64/dev/schizoreg.h,v
retrieving revision 1.9
diff -p -r1.9 schizoreg.h
*** dev/schizoreg.h	25 Mar 2012 03:13:08 -0000	1.9
--- dev/schizoreg.h	25 Mar 2012 08:35:24 -0000
*************** struct schizo_pbm_regs {
*** 32,41 ****
  	volatile u_int64_t	_unused1[64];		/* 0x0000 - 0x01ff */
  	struct iommureg2	iommu;			/* 0x0200 - 0x03ff */
  	volatile u_int64_t	_unused2[384];
! 	volatile u_int64_t	imap[64];
  	volatile u_int64_t	_unused3[64];
! 	volatile u_int64_t	iclr[64];
! 	volatile u_int64_t	_unused4[320];
  	volatile u_int64_t	ctrl;
  	volatile u_int64_t	__unused0;
  	volatile u_int64_t	afsr;
--- 32,49 ----
  	volatile u_int64_t	_unused1[64];		/* 0x0000 - 0x01ff */
  	struct iommureg2	iommu;			/* 0x0200 - 0x03ff */
  	volatile u_int64_t	_unused2[384];
! 	volatile u_int64_t	imap[64];		/* 0x1000 - 0x11ff */
  	volatile u_int64_t	_unused3[64];
! 	volatile u_int64_t	iclr[64];		/* 0x1400 - 0x15ff */
! 	volatile u_int64_t	_unused4_0[64];
! 	volatile u_int64_t	_unused4_1[64];		/* 0x1800 - 0x19ff */
! 	volatile u_int64_t	intr_retry;		/* 0x1a00 */
! 	volatile u_int64_t	_unused4_2;
! 	volatile u_int64_t	dma_flushsync_compl;	/* 0x1a10 */
! 	volatile u_int64_t	dma_flushsync_pend;	/* 0x1a18 */
! 	volatile u_int64_t	_unused4_3[60];
! 	volatile u_int64_t	_unused4_4[64];
! 	volatile u_int64_t	_unused4_5[64];
  	volatile u_int64_t	ctrl;
  	volatile u_int64_t	__unused0;
  	volatile u_int64_t	afsr;
*************** struct schizo_regs {
*** 112,117 ****
--- 120,127 ----
  #define	SCZ_PCI_ICLR_BASE		0x01400
  #define	SCZ_PCI_INTR_RETRY		0x01a00	/* interrupt retry */
  #define	SCZ_PCI_DMA_FLUSH		0x01a08	/* pci consistent dma flush */
+ #define	TOM_PCI_DMA_FLUSH_COMPLETE	0x01a10	/* diag */
+ #define	TOM_PCI_DMA_FLUSH_PENDING	0x01a18	/* Tomatillo version */
  #define	SCZ_PCI_CTRL			0x02000
  #define	SCZ_PCI_AFSR			0x02010
  #define	SCZ_PCI_AFAR			0x02018
Index: include/cpu.h
===================================================================
RCS file: /cvsroot/src/sys/arch/sparc64/include/cpu.h,v
retrieving revision 1.98
diff -p -r1.98 cpu.h
*** include/cpu.h	30 Jul 2011 19:29:12 -0000	1.98
--- include/cpu.h	25 Mar 2012 08:35:24 -0000
*************** struct intrhand {
*** 338,343 ****
--- 338,348 ----
  extern struct intrhand *intrhand[];
  extern struct intrhand *intrlev[MAXINTNUM];
  
+ /* errata and other handling */
+ void extra_blk_commit(char buf[64]);
+ extern bool tomatillo_extra_blk_commit;
+ extern bool fire_and_jalapeno_extra_blk_read;
+ 
  void	intr_establish(int level, bool mpsafe, struct intrhand *);
  void	*sparc_softintr_establish(int, int (*)(void *), void *);
  void	sparc_softintr_schedule(void *);
Index: include/pci_machdep.h
===================================================================
RCS file: /cvsroot/src/sys/arch/sparc64/include/pci_machdep.h,v
retrieving revision 1.25
diff -p -r1.25 pci_machdep.h
*** include/pci_machdep.h	4 Apr 2011 20:37:54 -0000	1.25
--- include/pci_machdep.h	25 Mar 2012 08:35:24 -0000
*************** struct pci_attach_args;
*** 57,63 ****
  typedef uint64_t pcitag_t; 
  
  typedef struct sparc_pci_chipset *pci_chipset_tag_t;
! typedef u_int pci_intr_handle_t;
  
  struct sparc_pci_chipset {
  	void		*cookie;	/* psycho_pbm/, but sssh! */
--- 57,63 ----
  typedef uint64_t pcitag_t; 
  
  typedef struct sparc_pci_chipset *pci_chipset_tag_t;
! typedef struct sparc_pci_intr_handle *pci_intr_handle_t;
  
  struct sparc_pci_chipset {
  	void		*cookie;	/* psycho_pbm/, but sssh! */
*************** struct sparc_pci_chipset {
*** 71,77 ****
  	void		*(*spc_intr_establish)(pci_chipset_tag_t, pci_intr_handle_t, int, int (*)(void *), void *);
  
  	/* private interfaces */
! 	int		(*spc_find_ino)(const struct pci_attach_args *, pci_intr_handle_t *);
  
  	int		spc_busmax;
  	struct spc_busnode {
--- 71,77 ----
  	void		*(*spc_intr_establish)(pci_chipset_tag_t, pci_intr_handle_t, int, int (*)(void *), void *);
  
  	/* private interfaces */
! 	int		(*spc_find_ino)(const struct pci_attach_args *, u_int *);
  
  	int		spc_busmax;
  	struct spc_busnode {
*************** struct sparc_pci_chipset {
*** 81,86 ****
--- 81,95 ----
  	}		(*spc_busnode)[256];
  };
  
+ struct sparc_pci_intr_handle {
+ 	u_int		pih_ivec;		/* value we use */
+ 	int		(*pih_func)(void *);	/* back ends for dma flush */
+ 	void		*pih_arg;
+ 	void		*pih_pbm2;
+ 	void		*pih_pbm;		/* our parent */
+ 	struct intrhand	*pih_ih;
+ };
+ 
  
  void		pci_attach_hook(struct device *, struct device *,
  				     struct pcibus_attach_args *);
Index: sparc64/cpu.c
===================================================================
RCS file: /cvsroot/src/sys/arch/sparc64/sparc64/cpu.c,v
retrieving revision 1.101
diff -p -r1.101 cpu.c
*** sparc64/cpu.c	8 Oct 2011 08:49:07 -0000	1.101
--- sparc64/cpu.c	25 Mar 2012 08:35:24 -0000
*************** static void cpu_reset_fpustate(void);
*** 108,113 ****
--- 108,118 ----
  
  volatile int sync_tick = 0;
  
+ /* workarounds and errata */
+ bool tomatillo_extra_blk_commit;
+ bool fire_and_jalapeno_extra_blk_read;
+ 
+ 
  /* The CPU configuration driver. */
  void cpu_attach(struct device *, struct device *, void *);
  int cpu_match(struct device *, struct cfdata *, void *);
Index: sparc64/intr.c
===================================================================
RCS file: /cvsroot/src/sys/arch/sparc64/sparc64/intr.c,v
retrieving revision 1.66
diff -p -r1.66 intr.c
*** sparc64/intr.c	12 Aug 2011 06:34:56 -0000	1.66
--- sparc64/intr.c	25 Mar 2012 08:35:24 -0000
*************** intr_establish(int level, bool mpsafe, s
*** 224,229 ****
--- 224,230 ----
  	}
  #endif
  
+ 	/* XXXSMP */
  	s = splhigh();
  	/*
  	 * Store in fast lookup table
Index: sparc64/locore.s
===================================================================
RCS file: /cvsroot/src/sys/arch/sparc64/sparc64/locore.s,v
retrieving revision 1.341
diff -p -r1.341 locore.s
*** sparc64/locore.s	17 Mar 2012 22:19:53 -0000	1.341
--- sparc64/locore.s	25 Mar 2012 08:35:25 -0000
*************** romtba:	POINTER	0
*** 207,213 ****
  #define	TRAP(type)	VTRAP(type, slowtrap)
  
  	/* architecturally undefined traps (cause panic) */
! #ifndef DEBUG
  #define	UTRAP(type)	sir; VTRAP(type, slowtrap)
  #else
  #define	UTRAP(type)	VTRAP(type, slowtrap)
--- 207,214 ----
  #define	TRAP(type)	VTRAP(type, slowtrap)
  
  	/* architecturally undefined traps (cause panic) */
! #define SIR_UNKNOWN_TRAPS
! #if !defined(DEBUG) || defined(SIR_UNKNOWN_TRAPS)
  #define	UTRAP(type)	sir; VTRAP(type, slowtrap)
  #else
  #define	UTRAP(type)	VTRAP(type, slowtrap)
*************** ENTRY(loadfpstate)
*** 5849,5854 ****
--- 5850,5914 ----
  #endif
  
  /*
+  * Tomatillo specific flushing function, errata 78, applicable on
+  * #version 4 and earlier.
+  *
+  * void extra_blk_commit(char buf[64]);
+  *
+  * expects 64 byte buffer passed in, as a dummy buffer.
+  */
+ ENTRY(extra_blk_commit)
+ 	rd      %fprs, %o1
+ 	or      %o1, FPRS_FEF, %o2
+ 	wr      %g0, %o2, %fprs
+ 	stda    %f0, [%o0] ASI_BLK_COMMIT_P
+ 	wr      %o1, 0, %fprs
+ 
+ 	retl
+ 	 membar  #Sync
+ 
+ /*
+  * Fire + Jalapeno specific flushing function.  From the Fire manual:
+  *
+  *    However, for Jalapeno, the Fire nexus driver, in ddi_dma_sync(),
+  *    will need to do a block read operation to any memory location,
+  *    followed by a membar sync to ensure that the CPUs internal
+  *    "invalidate FIFOs" are flushed (since these CPUs allow PIO read
+  *    returns to pass cache invalidates inside the CPU).
+  *
+  * void extra_blk_read(void);
+  */
+ ENTRY(extra_blk_read)
+ 	save	%sp, -CC64FSZ - 64, %sp
+ 	rd      %fprs, %o1
+ 
+ 	! are they in use?
+ 	btst	FPRS_DU|FPRS_DL|FPRS_FEF, %o1
+ 
+ 	! enable the FPU
+ 	or      %o1, FPRS_FEF, %o2
+ 	wr      %g0, %o2, %fprs
+ 
+ 	bz	1f
+ 	 add	%sp, BIAS + 64, %o0
+ 
+ 	! save the current regs
+ 	stda	%f0, [%o0] ASI_BLK_COMMIT_P
+ 
+ 1:
+ 	! do the bock read, maybe from the saved regs
+ 	ldda    [%o0] ASI_BLK_P, %f0
+ 
+ 	! restore everything back how it was
+ 	wr      %o1, 0, %fprs
+ 
+ 	membar  #Sync
+ 
+ 	retl
+ 	 restore
+ 	
+ 
+ /*
   * ienab_bis(bis) int bis;
   * ienab_bic(bic) int bic;
   *
Index: sparc64/pmap.c
===================================================================
RCS file: /cvsroot/src/sys/arch/sparc64/sparc64/pmap.c,v
retrieving revision 1.278
diff -p -r1.278 pmap.c
*** sparc64/pmap.c	25 Mar 2012 02:31:00 -0000	1.278
--- sparc64/pmap.c	25 Mar 2012 08:35:25 -0000
*************** pmap_enter(struct pmap *pm, vaddr_t va, 
*** 1901,1906 ****
--- 1901,1907 ----
  		KASSERT(pmap_ctx(pm)>=0);
  		i = ptelookup_va(va);
  		tte.tag = TSB_TAG(0, pmap_ctx(pm), va);
+ 		/* XXX why splhigh() here? */
  		s = splhigh();
  		if (wasmapped && pmap_is_on_mmu(pm)) {
  			tsb_invalidate(va, pm);