? ID Index: dev/crime.c =================================================================== RCS file: /cvsroot/src/sys/arch/sgimips/dev/crime.c,v retrieving revision 1.38 diff -p -u -r1.38 crime.c --- dev/crime.c 18 Feb 2015 16:47:58 -0000 1.38 +++ dev/crime.c 28 Feb 2021 10:22:58 -0000 @@ -110,6 +110,11 @@ crime_attach(device_t parent, device_t s sc->sc_dev = self; crm_iot = normal_memt; + /* + * crime_probe_memory() runs before this function, and assumes + * that CRIME's ma_addr is 0x1400_0000. + */ + KASSERT(ma->ma_addr == 0x14000000); if (bus_space_map(crm_iot, ma->ma_addr, 0x1000, BUS_SPACE_MAP_LINEAR, &crm_ioh)) panic("%s: can't map I/O space", __func__); @@ -341,3 +346,62 @@ crime_reboot(void) for (;;) ; } + +void +crime_probe_memory(phys_ram_seg_t *mem, int *mem_cnt) +{ + unsigned bank; + const size_t mb = 1024 * 1024; + + printf("Probing CRIME memory\n"); + + for (bank = 0; bank < CRIME_MEM_BANK_CTRLCNT; bank++) { + uint64_t crime_pa = 0x14000000; + uint64_t reg_pa = crime_pa + CRIME_MEM_BANK_CTRL_REG(bank); + uint64_t ctrl = mips3_ld(MIPS_PHYS_TO_KSEG1(reg_pa)); + uint64_t baseaddr, size; + unsigned i; + bool skip = false; + + baseaddr = (ctrl & CRIME_MEM_BANK_CTRLADDR) << CRIME_MEM_BANK_CTRLSHFT; + if (bank != 0 && baseaddr == 0) + continue; + size = mb * ((ctrl & CRIME_MEM_BANK_CTRLSDRAM_SIZE) ? 128 : 32); + + for (i = 0; i < *mem_cnt; i++) { + if (baseaddr <= (mem[i].start + mem[i].size) && + mem[i].start <= (baseaddr + size)) { + printf("Skipping bank %u over laps with mem region %u " + "(%llx <= %llx && %llx <= %llx)\n", bank, i, + baseaddr, mem[i].start + mem[i].size, + mem[i].start, baseaddr + size); + skip = true; + break;; + } + } + if (skip) + continue; + + if (baseaddr + size > mb * 256) + baseaddr += CRIME_HIGH_MEM_BASE; + + printf("CRIME MC: bank %u base address 0x%08llx size %uMiB\n", + bank, baseaddr, (unsigned)(size >> 20)); + +#ifdef CRIME_EXTRA_MEMORY_WORKS + printf("Adding extra range bank %u\n", bank); + mem[*mem_cnt].start = baseaddr; + mem[*mem_cnt].size = size; + (*mem_cnt)++; + + physmem += btoc(size); +#else + /* + * Adding the memory ranges that do not overlap with any + * existing ranges causes ahc(4) to become very unhappy. + */ + printf("Ignoring memory bank %u\n", bank); +#endif + + } +} Index: dev/crimereg.h =================================================================== RCS file: /cvsroot/src/sys/arch/sgimips/dev/crimereg.h,v retrieving revision 1.10 diff -p -u -r1.10 crimereg.h --- dev/crimereg.h 11 Dec 2005 12:18:52 -0000 1.10 +++ dev/crimereg.h 28 Feb 2021 10:22:59 -0000 @@ -36,7 +36,8 @@ * O2 CRIME register definitions */ -#define CRIME_BASE 0x14000000 /* all registers 64-bit access */ +#define CRIME_BASE 0x14000000 /* all registers 64-bit access */ +#define CRIME_HIGH_MEM_BASE 0x40000000 /* other view on memory */ /* Offset 0x00 -- revision register */ #define CRIME_REV 0x00 @@ -145,7 +146,15 @@ #define CRIME_MEM_BANK_CTRL4 0x0220 #define CRIME_MEM_BANK_CTRL5 0x0238 #define CRIME_MEM_BANK_CTRL6 0x0230 -#define CRIME_MEM_BANK_CTRL7 0x0248 +#define CRIME_MEM_BANK_CTRL7 0x0240 +#define CRIME_MEM_BANK_CTRLCNT 8 +#define CRIME_MEM_BANK_CTRL_REG(x) \ + (CRIME_MEM_BANK_CTRL0 + ((x) * 8)) +#define CRIME_MEM_BANK_CTRLMASK 0x11f +#define CRIME_MEM_BANK_CTRLADDR 0x01f +#define CRIME_MEM_BANK_CTRLSHFT 25 +#define CRIME_MEM_BANK_CTRLSDRAM_SIZE 0x100 + #define CRIME_MEM_REFRESH_CNTR 0x0248 #define CRIME_MEM_ERROR_STAT 0x0250 #define CRIME_MEM_ERROR_ADDR 0x0258 Index: dev/crimevar.h =================================================================== RCS file: /cvsroot/src/sys/arch/sgimips/dev/crimevar.h,v retrieving revision 1.9 diff -p -u -r1.9 crimevar.h --- dev/crimevar.h 18 Aug 2011 02:56:21 -0000 1.9 +++ dev/crimevar.h 28 Feb 2021 10:22:59 -0000 @@ -33,6 +33,7 @@ */ #include +#include struct crime_softc { device_t sc_dev; @@ -41,3 +42,4 @@ struct crime_softc { void crime_intr_mask(unsigned int); void crime_intr_unmask(unsigned int); void crime_reboot(void); +void crime_probe_memory(phys_ram_seg_t *, int *); Index: include/vmparam.h =================================================================== RCS file: /cvsroot/src/sys/arch/sgimips/include/vmparam.h,v retrieving revision 1.2 diff -p -u -r1.2 vmparam.h --- include/vmparam.h 14 Dec 2009 00:46:13 -0000 1.2 +++ include/vmparam.h 28 Feb 2021 10:22:59 -0000 @@ -3,3 +3,7 @@ #include #define VM_PHYSSEG_MAX 32 + +#if !defined(_LP64) +#define VM_FREELIST_FIRST512M 2 +#endif /* !_LP64 */ Index: sgimips/machdep.c =================================================================== RCS file: /cvsroot/src/sys/arch/sgimips/sgimips/machdep.c,v retrieving revision 1.150 diff -p -u -r1.150 machdep.c --- sgimips/machdep.c 11 Jun 2020 19:20:45 -0000 1.150 +++ sgimips/machdep.c 28 Feb 2021 10:22:59 -0000 @@ -638,6 +638,10 @@ mach_init(int argc, int32_t argv32[], ui } + /* IP32 systems may have extra memory known by the CRIME. */ + if (mach_type == MACH_SGI_IP32) + crime_probe_memory(mem_clusters, &mem_cluster_cnt); + if (mem_cluster_cnt == 0) panic("no free memory descriptors found");