Index: rk3328_cru.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/rockchip/rk3328_cru.c,v
retrieving revision 1.4
diff -p -u -r1.4 rk3328_cru.c
--- rk3328_cru.c	12 Aug 2018 16:48:04 -0000	1.4
+++ rk3328_cru.c	14 May 2019 07:38:39 -0000
@@ -147,6 +147,7 @@ static const char * mux_uart1_parents[] 
 static const char * mux_uart2_parents[] = { "clk_uart2_div", "clk_uart2_frac", "xin24m" };
 static const char * mux_mac2io_src_parents[] = { "clk_mac2io_src", "gmac_clkin" };
 static const char * mux_mac2io_ext_parents[] = { "clk_mac2io", "gmac_clkin" };
+static const char * mux_clk_tsadc_parents[] = { "xin24m" }; /* clk_24m */
 static const char * mux_2plls_parents[] = { "cpll", "gpll" };
 static const char * mux_2plls_hdmiphy_parents[] = { "cpll", "gpll", "dummy_hdmiphy" };
 static const char * comp_uart_parents[] = { "cpll", "gpll", "usb480m" };
@@ -377,6 +378,16 @@ static struct rk_cru_clk rk3328_cru_clks
 	RK_MUX(RK3328_SCLK_UART2, "sclk_uart2", mux_uart2_parents, CLKSEL_CON(18), __BITS(9,8)),
 	RK_MUXGRF(RK3328_SCLK_MAC2IO, "clk_mac2io", mux_mac2io_src_parents, GRF_MAC_CON1, __BIT(10)),
 	RK_MUXGRF(RK3328_SCLK_MAC2IO_EXT, "clk_mac2io_ext", mux_mac2io_ext_parents, GRF_SOC_CON4, __BIT(14)),
+
+	/* TSADC */
+	RK_COMPOSITE(RK3328_SCLK_TSADC, "clk_tsadc", mux_clk_tsadc_parents,
+		     CLKSEL_CON(22),	/* muxdiv_reg */
+		     0 /* ? */,		/* mux_mask */
+		     __BITS(0,0),	/* div_mask */
+		     CLKGATE_CON(2),	/* gate_reg */
+		     __BIT(6),		/* gate_mask */
+		     0),
+	RK_GATE(RK3328_PCLK_TSADC, "pclk_tsadc", "pclk_bus", CLKGATE_CON(16), 14),
 };
 
 static int