Index: rk3328_cru.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/rockchip/rk3328_cru.c,v
retrieving revision 1.4
diff -p -u -r1.4 rk3328_cru.c
--- rk3328_cru.c	12 Aug 2018 16:48:04 -0000	1.4
+++ rk3328_cru.c	14 May 2019 23:17:22 -0000
@@ -147,6 +147,7 @@ static const char * mux_uart1_parents[] 
 static const char * mux_uart2_parents[] = { "clk_uart2_div", "clk_uart2_frac", "xin24m" };
 static const char * mux_mac2io_src_parents[] = { "clk_mac2io_src", "gmac_clkin" };
 static const char * mux_mac2io_ext_parents[] = { "clk_mac2io", "gmac_clkin" };
+static const char * mux_clk_tsadc_parents[] = { "clk_24m" };
 static const char * mux_2plls_parents[] = { "cpll", "gpll" };
 static const char * mux_2plls_hdmiphy_parents[] = { "cpll", "gpll", "dummy_hdmiphy" };
 static const char * comp_uart_parents[] = { "cpll", "gpll", "usb480m" };
@@ -329,6 +330,15 @@ static struct rk_cru_clk rk3328_cru_clks
 		     CLKGATE_CON(2),	/* gate_reg */
 		     __BIT(12),		/* gate_mask */
 		     0),
+	RK_COMPOSITE(RK3328_SCLK_TSADC, "clk_tsadc", mux_clk_tsadc_parents,
+		     CLKSEL_CON(22),	/* muxdiv_reg */
+		     0,			/* mux_mask */
+		     __BITS(9,0),	/* div_mask */
+		     CLKGATE_CON(2),	/* gate_reg */
+		     __BIT(6),		/* gate_mask */
+		     0),
+
+	RK_DIV(0, "clk_24m", "xin24m", CLKSEL_CON(2), __BITS(12,8), 0),
 
 	RK_GATE(0, "apll_core", "apll", CLKGATE_CON(0), 0),
 	RK_GATE(0, "dpll_core", "dpll", CLKGATE_CON(0), 1),
@@ -351,6 +361,7 @@ static struct rk_cru_clk rk3328_cru_clks
 	RK_GATE(RK3328_PCLK_UART0, "pclk_uart0", "pclk_bus", CLKGATE_CON(16), 11),
 	RK_GATE(RK3328_PCLK_UART1, "pclk_uart1", "pclk_bus", CLKGATE_CON(16), 12),
 	RK_GATE(RK3328_PCLK_UART2, "pclk_uart2", "pclk_bus", CLKGATE_CON(16), 13),
+	RK_GATE(RK3328_PCLK_TSADC, "pclk_tsadc", "pclk_bus", CLKGATE_CON(16), 14),
 	RK_GATE(RK3328_SCLK_MAC2IO_REF, "clk_mac2io_ref", "clk_mac2io", CLKGATE_CON(9), 7),
 	RK_GATE(RK3328_SCLK_MAC2IO_RX, "clk_mac2io_rx", "clk_mac2io", CLKGATE_CON(9), 4),
 	RK_GATE(RK3328_SCLK_MAC2IO_TX, "clk_mac2io_tx", "clk_mac2io", CLKGATE_CON(9), 5),
@@ -377,6 +388,7 @@ static struct rk_cru_clk rk3328_cru_clks
 	RK_MUX(RK3328_SCLK_UART2, "sclk_uart2", mux_uart2_parents, CLKSEL_CON(18), __BITS(9,8)),
 	RK_MUXGRF(RK3328_SCLK_MAC2IO, "clk_mac2io", mux_mac2io_src_parents, GRF_MAC_CON1, __BIT(10)),
 	RK_MUXGRF(RK3328_SCLK_MAC2IO_EXT, "clk_mac2io_ext", mux_mac2io_ext_parents, GRF_SOC_CON4, __BIT(14)),
+
 };
 
 static int
Index: rk_tsadc.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/rockchip/rk_tsadc.c,v
retrieving revision 1.4
diff -p -u -r1.4 rk_tsadc.c
--- rk_tsadc.c	14 May 2019 07:45:03 -0000	1.4
+++ rk_tsadc.c	14 May 2019 23:17:22 -0000
@@ -57,7 +57,7 @@ __KERNEL_RCSID(0, "$NetBSD: rk_tsadc.c,v
 
 #include <dev/sysmon/sysmonvar.h>
 
-//#define RKTSADC_DEBUG
+#define RKTSADC_DEBUG
 #ifdef RKTSADC_DEBUG
 #define DPRINTF(fmt, ...) \
 	printf("%s:%d: " fmt "\n", __func__, __LINE__, ## __VA_ARGS__)
@@ -369,7 +369,7 @@ static const rk_data_table rk3399_data_t
 };
 
 static const char * const compatible_rk3328[] = {
-#if 0
+#if 1
 	/*
 	 * does not yet report sane values.  should be between 3421 and 3800,
 	 * but CPU tends to report < 1000 and the GPU reports 600-1600.